Staff Profile

Dr Jordan Morris is a Visiting Researcher in Electronic Engineering within the Microsystems Research Group and Principal Engineer at Literal Labs (a start-up company specialising in Tsetlin Machine-based Artificial Intelligence).

Qualifications

2018: PhD in Microelectronic Engineering and Semiconductor Physics, Newcastle University and Arm Ltd.

2013: MEng (First Class Honours) in Electrical and Electronic Engineering, Newcastle University

Experience

June 2023-to-date: Founding Engineer, Literal Labs, UK

August 2019-to-date: Research Associate, Newcastle University, UK

2017 – 2019: Software Engineer, BorgWarner, UK

2013 – 2016: Research Fellow, Arm, UK

2012 – 2013: Software Engineer, S3ID, UK

Memberships

IEEE Member

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Dr Jordan Morris's main research profile may be found on researchgate.

Research Interests

A. Low Power VLSI: Low power ASIC design, specifically full-custom layout, specialised standard cell characterisation and sub-threshold operation in deep submicron technology nodes.

B. Parallel Architectures: Parallel and distributed computing. Event-driven and partially ordered systems.

C. Novel Machine Learning and AI: Software/Hardware co-design of novel artificial intelligence architectures. Propositional logic-based machine learning.

D. Rapid Prototyping Techniques: Accelerated ASIC workflows, FPGA prototyping and software benchmarking.

Research Grants

2023: Named-Researcher, SONNETS, EPSRC, £6.5M

2023: Named-Researcher, Mignon AI (Hardware Grant), Innovate UK, 150k

2023: Named-Researcher, Mignon AI (Software Grant), Innovate UK, 50k

• Articles

  • Morris J, Rafiev A, Bragg G, Vousden M, Thomas D, Yakovlev A, Brown A. An Event-Driven Approach to Genotype Imputation on a Custom RISC-V Cluster. IEEE/ACM Transactions on Computational Biology and Bioinformatics 2024, 21(1), 26-35.
  • Vousden M, Morris J, McLachlan Bragg G, Beaumont J, Rafiev A, Luk W, Thomas D, Brown A. Event-based high throughput computing: A series of case studies on a massively parallel softcore machine. IET Computers and Digital Techniques 2023, 17(1), 29-42.
  • Morris J, Prabhat P, Myers J, Yakovlev A. A Subthreshold Layout Strategy for Faster and Lower Energy Complex Digital Circuits. Journal of Low Power Electronics and Applications 2022, 12(3), 43.
  • Wheeldon A, Morris J, Sokolov D, Yakovlev A. Self-timed, Minimum Latency Circuits for the Internet of Things. Integration 2019, 69, 138-146.

• Book Chapter

  • Rafiev A, Morris J, Xia F, Yakovlev A, Naylor M, Moore S, Thomas D, Bragg G, Vousden M, Brown A. Practical Distributed Implementation of Very Large Scale Petri Net Simulations. In: Transactions on Petri Nets and Other Models of Concurrency XVI. Berlin: Springer, 2022, pp.112-139.

• Conference Proceedings (inc. Abstracts)

  • Rafiev A, Morris J, Xia F, Shafik R, Yakovlev A, Granmo O-C, Brown AD. Visualization of Machine Learning Dynamics in Tsetlin Machines. In: International Symposium on the Tsetlin Machine (ISTM). 2022, Grimstad, Norway: IEEE.
  • Morris J, Rafiev A, Xia F, Shafik R, Yakovlev A, Brown A. An Alternate Feedback Mechanism for Tsetlin Machines on Parallel Architectures. In: International Symposium on the Tsetlin Machine. 2022, Grimstad, Norway.
  • Wheeldon A, Yakovlev A, Shafik R, Morris J. Low-Latency Asynchronous Logic Design for Inference at the Edge. In: Design, Automation & Test in Europe Conference & Exhibition (DATE 2021). 2021, Grenoble, France: IEEE.
  • Morris J, Prabhat P, Myers J, Yakovlev A. Unconventional Layout Techniques for a High Performance, Low Variability Subthreshold Standard Cell Library. In: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI. 2017, Bochum, Germany: IEEE Computer Society.
  • Wheeldon A, Morris J, Sokolov D, Yakovlev A. Power proportional adder design for Internet of Things in a 65nm process. In: 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). 2017, Thessaloniki, Greece: IEEE.